1. Field of the Invention
The present invention relates to an electrostatic discharge (ESD) protection circuit and its application, and in particular relates to an ESD protection circuit for thin film transistor (TFT) liquid crystal display (LCD) panel and a display panel using the same for ESD protection.
2. Description of the Related Art
ESD management is an increased reliability issue in complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) due to technology scaling and high frequency requirements. For example in radio frequency (RF) ICs, on-chip ESD protection design suffers from several limitations, such as low parasitic capacitance, constant input capacitance, insensitivity to substrate coupling noises, and robust ESD protection. In order to fulfill these requirements, diodes are commonly used for ESD protection in I/O circuits.
In the above, the power-rail ESD clamp circuit is important in improving the ESD protection in IC products. As well, the power-rail ESD clamp circuit must be triggered efficiently during ESD events.
TFT LCD display panels accumulate significant charge in the manufacturing process, for example low temperature poly-silicon (LTPS) process, posing danger to transistors of internal driving circuit.
In general, ESD protection circuits for LTPS TFT panels, use a diode between VDD and VSS lines. The diode is turned on, providing a discharge path for a transient current when ESD events occur in the VDD line or the VSS line. However, a bias still exist between the VDD and VSS lines and generates discharge effect in internal circuits. Thus, the above method is unable to enhance the ESD protection.